1. Field of the Invention
The invention relates to a method for manufacturing a semiconductor apparatus.
2. Background Art
There exists a conventional method for manufacturing a semiconductor package including mounting a metal block on a Cu substrate for source wire bonding (for example, refer to JP-A H5-347324 (Kokai) (1993)).
However, the structure of the semiconductor apparatus discussed in JP-A H5-347324 (Kokai) (1993) requires bonding wires and therefore is problematic in that the semiconductor apparatus as an entirety is large, many processing processes are necessary, and costs are high.
Further, another conventional semiconductor apparatus includes a semiconductor device having bumps disposed on a first major surface to draw out wires, a face on a side opposite to the first major surface contacting a first metal electrode via a first conductor, and an outer face covered with an insulator. The wires drawn out from the bumps are connected to a second metal electrode via a second conductor (for example, refer to JP-A 2000-252235 (Kokai)).
However, in the semiconductor apparatus discussed in JP-A 2000-252235 (Kokai), the semiconductor device is not disposed in the central portion of the semiconductor apparatus but is disposed on the first metal electrode side. Thereby, the semiconductor device unfortunately undergoes large shocks during transfer of the semiconductor apparatus. Moreover, the semiconductor apparatus as an entirety is undesirably large and costs unfortunately increase because the conductor is made of a conductive resin, a high melting-point solder, etc., and the metal electrodes are made of Al, Cu, Au, alloys thereof, etc.